Possible new architecture
1 Jun 2007 2:28:52 UTC
Topic 192802
(moderation:
There are some who can live without wild things and some who cannot. - Aldo Leopold
Possible new architecture
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Most modern processors are already pipelined, that is they process more than one instruction at the same time. The problem is that if the program makes a jump it must empty the pipeline. So the burden falls on the software, as always. From what I read in the Austin site, TRIPS runs at 366 MHz, slower than my Pentium II.
Tullio
RE: Most modern processors
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The problem are conditional jumps only (if() then else, so to speak). CPUs will try to predict which way the jump will go, and execute code depending on this estimation ("branch prediction" and "speculative execution"). Only if they later find out that the guessed branch was wrong, the pipeline will stall. I think the basic concept of branch prediction and speculative execution dates back to Intel's Pentium II and AMDs K6 already, maybe earlier.
CU
BRM
Actually the original Pentium
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Actually the original Pentium had rudimentary branch-prediction capabilities and also two pipelines/execution units.
I don't think this a
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I don't think this a traditional pipeline processor. It can 'process 16 operations simultaneously with 1K instructions pipelined; where the performance of the most advanced processors available are four operations processed simultaneously. Due the simplicity of the design it will be possible to implement this architecture in the future with nanoscale technologies...
There are some who can live without wild things and some who cannot. - Aldo Leopold