the 5V by 3A adapter on the upper left has two parallel pins, so no help without adaption for DownUnda wall 240V plugs. No matter, I have an equivalent. I ordered two Gen1 boards, each comes with a heat sink ( shown to the left of each ) for the Zynq/ARM, USB cabling, SD disk and dis-assembled case. The Parallella really is credit card size :
within an assembled case :
where I have taken the liberty of applying supplied heat sinks to both the Zynq/ARM ( closest to the Ethernet on the right ) and the Epiphany chip ( E16 on the left ). Also I have put the panel with logo on the other 'bottom' side and used the clear one for the 'top' : because I'm going to mount a fan through that top to blow right over the heat sinks. The MAC address is printed on the sticker ( upper left of board ) which I bound to a fixed IP address through DHCP on my home network router. Once I downloaded, decompressed, and wrote the Linaro ( a modded Ubuntu 12.10 ) image to the microSD card, plonked it in the Parallella SD port then powered 'er up :
the monitor shows the TTY session in progress. I will investigate a standalone system - USB keyboard/mouse inputs, and HDMI to a monitor - later. Of course, how could I forget the T-shirt :
and I cracked open for a wee dram ( or two ) of some Xmas-gifted triple distilled Irish whiskey to celebrate ! :-)
Cheers, Mike.
(edit) Yup, the E16 test script ( multiplying two 512 by 512 floating point matrices ) just blew the doors off the ARM by over 1000%. Gentlemen, we have a hotrod. So FFT's here I come ... :-0
I have made this letter longer than usual because I lack the time to make it shorter ...
... and my other CPU is a Ryzen 5950X :-) Blaise Pascal
How are you planning on wiring up the fan? Are you going to use a USB port to power it? There looks like some pins next to the network connector which I assume are GPIO pins.
I am surprised nobody makes a kit for the Raspberry Pi to use via the GPIO pins as they too get hot when under load.
How are you planning on wiring up the fan? Are you going to use a USB port to power it? There looks like some pins next to the network connector which I assume are GPIO pins.
I am surprised nobody makes a kit for the Raspberry Pi to use via the GPIO pins as they too get hot when under load.
There is an overclock kit for the Raspberry Pi. You can see it here(scroll to bottom of page) and here
I can tell you that I had to order two additional fans. These fans have limited life time running 24x7. Also this fan hooks into the gpio pins one of two ways. It depends on how much rpm you want out of the fan. I set the Pi for a medium overclock and it runs ~30C with this overclock kit installed.
You could also buy a USB fan and point it at your case. This particular case is hinged so you could "flip" it open to expose all components to the fan.
If you're not space- and/or estetics-constrained I can think of more efficient cooling solutions than a tiny 13k rpm fan with hardly any blades. And at 0.6 W it causes a pretty big hit to the overall energy efficiency ;)
Yes, it does exist HB ! After I do all this housekeeping/acclimation stuff I'll go for gold in the dull, dirty & dangerous FFT district! :-)
I'm after a 5V and under 2.25W solution ( USB 2.0 ). It does have GPIO on the flip side, but with one thing & another I think I'll supply the fan with separate power. I reckon this chap will suit, I can get it DownUnda here ( for that price I'd want/expect 24/7 endurance! ). I'll mount a micro USB female connector to the acrylic nearby the fan position and solder/wire the fan's power leads to it.
Rather like the Pi, the power density on this does deserve a dedicated cooling kit - for the hot in the hotrod - but Parallella is a development/evolving product and I for one will report to Adapteva my experiences.
Cheers, Mike.
I have made this letter longer than usual because I lack the time to make it shorter ...
... and my other CPU is a Ryzen 5950X :-) Blaise Pascal
Ah, the good old Pabst fans. They seem a bit stuck in the 90's but high quality nevertheless.
What I could also imagine to work well is an old Pentium 3 era cpu heat sink in passive mode, mounted perpendicular to the ethernet port. It would probably need some material removement on the back side, though, in order not to touch any other components. This could be avoided by placing some flat Al/Cu pieces onto the chips as spacers and then mounting the large heatsink on these. This would introduce another thermal interface layer with TIM, but be easier to implement. Depending on which heat sink you can find the acrylic case might get too small - but when has a heat sink ever been too large? ;)
@MrS : I have found that once you go below about 80mm it's hard to find a good/suitable fan. Indeed raiding some old 90's hardware lying around is a neat option.
Cheers, Mike.
I have made this letter longer than usual because I lack the time to make it shorter ...
... and my other CPU is a Ryzen 5950X :-) Blaise Pascal
I am working with VHDL/Verilog for a long time (MSc, PhD) and for the last 2 years hardware development is my daily job. I have some questions for the very interesting discussion about porting EaH clients to FPGAs.
1. The FFT calculations performed in the EaH is always in a frame that is a power of 2 (e.g 2^20) or you need a non-power-of-2 FFT core? The non-power-of-2 FFT implementations are far more complex in hardware.
2. Do you need floating-point calculations in the FFT core or you can use fixed-point / block-floating-point calculations also ? The floating-point calculations will result in more complex and more large (hardware resources) implementations.
3. The maximum length of the FFT calculation is N=2^20 ? The majority of hardware FFT cores are based on 2 architectures. One (in-place) to minimize the hardware resources and one (pipeline) to maximize the throughput. Both architectures needs at least (in-place) N*complex_word_length memory for storing the input, the intermediate results and the output of the FFT calculation. If N is too large (2^20) then a hardware implementation of the FFT core will not fit in a small/cheap FPGA device (even the in-place implementation needs 64Mbits memory for 64bit complex words - a large xilinx spartan6 device has at most ~5Mbit memory).
You need an external RAM to store the intermediate results which compromise the performance of the FFT core. There are some algorithms for very long FFT calculations (four-step, six-step) which may be more suitable for the case of an external RAM but I am not familiar with these…
4. If you choose to accelerate some EaH calculations with hardware accelerators then it is more efficient to use a SoC/FPGA like Xilinx Zynq. You can use the ARM processors for running the EaH client and the FPGA resources to implement some hardware accelerators. The problem with this solution is that the Xilinx Zynq device has limited FPGA resources for implementing a large core like 2^20-point FFT. You will need a large Zynq device like Z-7045 / Z-7100 which are not cheap. Furthermore, in a software/hardware partitioning it is more efficient (if possible) to implement a hardware accelerator which contain a path of calculations and not only one calculation (FFT) because the data transfers to and from the accelerator are costly. Is there any profiling information for the EaH client software? If the FFT calculation is the bottleneck and consume more than the 50% of the calculations performed then I think that one FFT hardware accelerator will be the case. If the bottleneck is in a path of calculation (containing the FFT) then I think that this path must be accelerated with a hardware core.
No smoke is usually good.
)
No smoke is usually good.
David
Miserable old git
Patiently waiting for the asteroid with my name on it.
Yes, it finally arrived !
)
Yes, it finally arrived ! Wooo, woooo, giddy-up .... :-) :-) :-)
This is what is within :
the 5V by 3A adapter on the upper left has two parallel pins, so no help without adaption for DownUnda wall 240V plugs. No matter, I have an equivalent. I ordered two Gen1 boards, each comes with a heat sink ( shown to the left of each ) for the Zynq/ARM, USB cabling, SD disk and dis-assembled case. The Parallella really is credit card size :
within an assembled case :
where I have taken the liberty of applying supplied heat sinks to both the Zynq/ARM ( closest to the Ethernet on the right ) and the Epiphany chip ( E16 on the left ). Also I have put the panel with logo on the other 'bottom' side and used the clear one for the 'top' : because I'm going to mount a fan through that top to blow right over the heat sinks. The MAC address is printed on the sticker ( upper left of board ) which I bound to a fixed IP address through DHCP on my home network router. Once I downloaded, decompressed, and wrote the Linaro ( a modded Ubuntu 12.10 ) image to the microSD card, plonked it in the Parallella SD port then powered 'er up :
the monitor shows the TTY session in progress. I will investigate a standalone system - USB keyboard/mouse inputs, and HDMI to a monitor - later. Of course, how could I forget the T-shirt :
and I cracked open for a wee dram ( or two ) of some Xmas-gifted triple distilled Irish whiskey to celebrate ! :-)
Cheers, Mike.
(edit) Yup, the E16 test script ( multiplying two 512 by 512 floating point matrices ) just blew the doors off the ARM by over 1000%. Gentlemen, we have a hotrod. So FFT's here I come ... :-0
I have made this letter longer than usual because I lack the time to make it shorter ...
... and my other CPU is a Ryzen 5950X :-) Blaise Pascal
How are you planning on
)
How are you planning on wiring up the fan? Are you going to use a USB port to power it? There looks like some pins next to the network connector which I assume are GPIO pins.
I am surprised nobody makes a kit for the Raspberry Pi to use via the GPIO pins as they too get hot when under load.
BOINC blog
RE: How are you planning on
)
There is an overclock kit for the Raspberry Pi. You can see it here(scroll to bottom of page) and here
I can tell you that I had to order two additional fans. These fans have limited life time running 24x7. Also this fan hooks into the gpio pins one of two ways. It depends on how much rpm you want out of the fan. I set the Pi for a medium overclock and it runs ~30C with this overclock kit installed.
You could also buy a USB fan and point it at your case. This particular case is hinged so you could "flip" it open to expose all components to the fan.
If you're not space- and/or
)
If you're not space- and/or estetics-constrained I can think of more efficient cooling solutions than a tiny 13k rpm fan with hardly any blades. And at 0.6 W it causes a pretty big hit to the overall energy efficiency ;)
MrS
Scanning for our furry friends since Jan 2002
Congratulations Mike! Good
)
Congratulations Mike!
Good to see the thing actually exists ;-) . I have a backer number in the 5000s so I'll have to wait a bit longer.
Looking forward to see this thing appear on E@H !
Cheers
HB
Hi guys ! :-) Yes, it does
)
Hi guys ! :-)
Yes, it does exist HB ! After I do all this housekeeping/acclimation stuff I'll go for gold in the dull, dirty & dangerous FFT district! :-)
I'm after a 5V and under 2.25W solution ( USB 2.0 ). It does have GPIO on the flip side, but with one thing & another I think I'll supply the fan with separate power. I reckon this chap will suit, I can get it DownUnda here ( for that price I'd want/expect 24/7 endurance! ). I'll mount a micro USB female connector to the acrylic nearby the fan position and solder/wire the fan's power leads to it.
Rather like the Pi, the power density on this does deserve a dedicated cooling kit - for the hot in the hotrod - but Parallella is a development/evolving product and I for one will report to Adapteva my experiences.
Cheers, Mike.
I have made this letter longer than usual because I lack the time to make it shorter ...
... and my other CPU is a Ryzen 5950X :-) Blaise Pascal
Ah, the good old Pabst fans.
)
Ah, the good old Pabst fans. They seem a bit stuck in the 90's but high quality nevertheless.
What I could also imagine to work well is an old Pentium 3 era cpu heat sink in passive mode, mounted perpendicular to the ethernet port. It would probably need some material removement on the back side, though, in order not to touch any other components. This could be avoided by placing some flat Al/Cu pieces onto the chips as spacers and then mounting the large heatsink on these. This would introduce another thermal interface layer with TIM, but be easier to implement. Depending on which heat sink you can find the acrylic case might get too small - but when has a heat sink ever been too large? ;)
MrS
Scanning for our furry friends since Jan 2002
Wow ! Adapteva is now backed
)
Wow ! Adapteva is now backed by Ericsson no less.
@MrS : I have found that once you go below about 80mm it's hard to find a good/suitable fan. Indeed raiding some old 90's hardware lying around is a neat option.
Cheers, Mike.
I have made this letter longer than usual because I lack the time to make it shorter ...
... and my other CPU is a Ryzen 5950X :-) Blaise Pascal
Hi, I am working with
)
Hi,
I am working with VHDL/Verilog for a long time (MSc, PhD) and for the last 2 years hardware development is my daily job. I have some questions for the very interesting discussion about porting EaH clients to FPGAs.
1. The FFT calculations performed in the EaH is always in a frame that is a power of 2 (e.g 2^20) or you need a non-power-of-2 FFT core? The non-power-of-2 FFT implementations are far more complex in hardware.
2. Do you need floating-point calculations in the FFT core or you can use fixed-point / block-floating-point calculations also ? The floating-point calculations will result in more complex and more large (hardware resources) implementations.
3. The maximum length of the FFT calculation is N=2^20 ? The majority of hardware FFT cores are based on 2 architectures. One (in-place) to minimize the hardware resources and one (pipeline) to maximize the throughput. Both architectures needs at least (in-place) N*complex_word_length memory for storing the input, the intermediate results and the output of the FFT calculation. If N is too large (2^20) then a hardware implementation of the FFT core will not fit in a small/cheap FPGA device (even the in-place implementation needs 64Mbits memory for 64bit complex words - a large xilinx spartan6 device has at most ~5Mbit memory).
You need an external RAM to store the intermediate results which compromise the performance of the FFT core. There are some algorithms for very long FFT calculations (four-step, six-step) which may be more suitable for the case of an external RAM but I am not familiar with these…
4. If you choose to accelerate some EaH calculations with hardware accelerators then it is more efficient to use a SoC/FPGA like Xilinx Zynq. You can use the ARM processors for running the EaH client and the FPGA resources to implement some hardware accelerators. The problem with this solution is that the Xilinx Zynq device has limited FPGA resources for implementing a large core like 2^20-point FFT. You will need a large Zynq device like Z-7045 / Z-7100 which are not cheap. Furthermore, in a software/hardware partitioning it is more efficient (if possible) to implement a hardware accelerator which contain a path of calculations and not only one calculation (FFT) because the data transfers to and from the accelerator are costly. Is there any profiling information for the EaH client software? If the FFT calculation is the bottleneck and consume more than the 50% of the calculations performed then I think that one FFT hardware accelerator will be the case. If the bottleneck is in a path of calculation (containing the FFT) then I think that this path must be accelerated with a hardware core.
Thank you,